Paul E. McKenney <paul...@linux.vnet.ibm.com> wrote: > - Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q); > + Q = READ_ONCE(P); D = READ_ONCE(*Q); > > the CPU will issue the following memory operations: > > Q = LOAD P, D = LOAD *Q
The CPU may now issue two barriers in addition to the loads, so should we show
this? E.g.:
Q = LOAD P, BARRIER, D = LOAD *Q, BARRIER
David
