From: Greentime Hu <greent...@andestech.com>

This patch adds support for device tree.

Signed-off-by: Vincent Chen <vince...@andestech.com>
Signed-off-by: Greentime Hu <greent...@andestech.com>
---
 arch/nds32/boot/dts/Makefile  |    8 +++++
 arch/nds32/boot/dts/ae3xx.dts |   65 +++++++++++++++++++++++++++++++++++++++++
 arch/nds32/kernel/devtree.c   |   19 ++++++++++++
 3 files changed, 92 insertions(+)
 create mode 100644 arch/nds32/boot/dts/Makefile
 create mode 100644 arch/nds32/boot/dts/ae3xx.dts
 create mode 100644 arch/nds32/kernel/devtree.c

diff --git a/arch/nds32/boot/dts/Makefile b/arch/nds32/boot/dts/Makefile
new file mode 100644
index 0000000..d31faa8
--- /dev/null
+++ b/arch/nds32/boot/dts/Makefile
@@ -0,0 +1,8 @@
+ifneq '$(CONFIG_NDS32_BUILTIN_DTB)' '""'
+BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_NDS32_BUILTIN_DTB)).dtb.o
+else
+BUILTIN_DTB :=
+endif
+obj-$(CONFIG_OF) += $(BUILTIN_DTB)
+
+clean-files := *.dtb *.dtb.S
diff --git a/arch/nds32/boot/dts/ae3xx.dts b/arch/nds32/boot/dts/ae3xx.dts
new file mode 100644
index 0000000..0ef2c44
--- /dev/null
+++ b/arch/nds32/boot/dts/ae3xx.dts
@@ -0,0 +1,65 @@
+/dts-v1/;
+/ {
+       compatible = "andestech,ae3xx";
+       #address-cells = <1>;
+       #size-cells = <1>;
+       interrupt-parent = <&intc>;
+
+       chosen {
+               stdout-path = &serial0;
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x00000000 0x40000000>;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "andestech,n13", "andestech,nds32v3";
+                       reg = <0>;
+                       clock-frequency = <60000000>;
+               };
+       };
+
+       apb: clk@0 {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <30000000>;
+       };
+
+
+       intc: interrupt-controller {
+               compatible = "andestech,ativic32";
+               #interrupt-cells = <1>;
+               interrupt-controller;
+       };
+
+       serial0: serial@f0300000 {
+               compatible = "andestech,uart16550", "ns16550a";
+               reg = <0xf0300000 0x1000>;
+               interrupts = <8>;
+               clock-frequency = <14745600>;
+               reg-shift = <2>;
+               reg-offset = <32>;
+               no-loopback-test = <1>;
+       };
+
+       timer0: timer@f0400000 {
+               compatible = "andestech,atcpit100";
+               reg = <0xf0400000 0x1000>;
+               interrupts = <2>;
+               clocks = <&apb>;
+               clock-names = "PCLK";
+       };
+
+       mac0: mac@e0100000 {
+               compatible = "andestech,atmac100";
+               reg = <0xe0100000 0x1000>;
+               interrupts = <18>;
+       };
+
+};
diff --git a/arch/nds32/kernel/devtree.c b/arch/nds32/kernel/devtree.c
new file mode 100644
index 0000000..bdce0fe
--- /dev/null
+++ b/arch/nds32/kernel/devtree.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2005-2017 Andes Technology Corporation
+
+#include <linux/bug.h>
+#include <linux/printk.h>
+#include <linux/of_fdt.h>
+
+void __init early_init_devtree(void *params)
+{
+       if (!params || !early_init_dt_scan(params)) {
+               pr_crit("\n"
+                       "Error: invalid device tree blob at (virtual address 
0x%p)\n"
+                       "\nPlease check your bootloader.", params);
+
+               BUG_ON(1);
+       }
+
+       dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
+}
-- 
1.7.9.5

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