On Sun, 2018-01-14 at 16:41 +0100, Borislav Petkov wrote: > On Sat, Jan 13, 2018 at 05:27:30PM -0600, Tom Lendacky wrote: > > > > The PAUSE instruction is currently used in the retpoline and RSB filling > > macros as a speculation trap. The use of PAUSE was originally suggested > > because it showed a very, very small difference in the amount of > > cycles/time used to execute the retpoline as compared to LFENCE. On AMD, > > the PAUSE instruction is not a serializing instruction, so the pause/jmp > > loop will use excess power as it is speculated over waiting for return > > to mispredict to the correct target. > > > > The RSB filling macro is applicable to AMD, and, if software is unable to > > verify that LFENCE is serializing on AMD (possible when running under a > > hypervisor), the generic retpoline support will be used and, so, is also > > applicable to AMD. Keep the current usage of PAUSE for Intel, but add an > > LFENCE instruction to the speculation trap for AMD. > > > > Signed-off-by: Tom Lendacky <[email protected]> > > --- > > arch/x86/include/asm/nospec-branch.h | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > Reviewed-by: Borislav Petkov <[email protected]>
Acked-by: Arjan van de Ven <[email protected]> Acked-by: David Woodhouse <[email protected]>
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