On 01/25/2018 10:10 AM, Dave Hansen wrote:
> On 01/25/2018 08:14 AM, David Woodhouse wrote:
>> +static bool __init early_cpu_vulnerable_meltdown(struct cpuinfo_x86 *c)
>> +{
>> + u64 ia32_cap = 0;
>> +
>> + if (x86_match_cpu(cpu_no_meltdown))
>> + return false;
>> +
>> + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
>> + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
>> +
>> + /* Rogue Data Cache Load? No! */
>> + if (ia32_cap & ARCH_CAP_RDCL_NO)
>> + return false;
>> +
>> + return true;
>> +}
>
> Feel free to add my ack on this. It looks fine to me. I'll test and
> submit any necessary fixes once I actually get a system that has this bit.
Well, that was fast. A system supporting the RDCL_NO bit booted this
code. It reported not being affected by meltdown:
foo:/sys/devices/system/cpu/vulnerabilities/ # grep . *
meltdown:Not affected
spectre_v1:Vulnerable
spectre_v2:Vulnerable: Minimal generic ASM retpoline
foo:/sys/devices/system/cpu/vulnerabilities/ #
