The dt property fsl,use-minimum-ecc requires a NAND chip to provide a ECC strength/step size, otherwise the driver fails to probe. This is by design to avoid that the driver uses a fallback and later changes ECC parameters due to additionion of a NAND chip driver. Document the current behavior.
Signed-off-by: Stefan Agner <[email protected]> --- Documentation/devicetree/bindings/mtd/gpmi-nand.txt | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt index b289ef3c1b7e..eb2d9919d063 100644 --- a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt @@ -34,9 +34,8 @@ Optional properties: automatically discoverable for some flash (e.g., according to the ONFI standard). However, note that if this strength is not - discoverable or this property is not enabled, - the software may chooses an implementation-defined - ECC scheme. + discoverable the driver will fail probing with + an error. - fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB area with the byte in the data area but rely on the flash based BBT for identifying bad blocks. -- 2.16.1
