It seems both PCLK_I2S1 and SCLK_I2S1 clocks need to be enabled before
I2S1 control registers can be accessed on exynos5433. If SCLK clock
is disabled an exception is triggered. To fix this parent clock of
the RCLK_SRC clock is assigned to pri_dai->op_clk so required gate
clock is handled by the runtime PM ops.

Signed-off-by: Sylwester Nawrocki <s.nawro...@samsung.com>
---
Changes since v1:
 - removed stray whitespace change.
---
 sound/soc/samsung/i2s.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 5088d12faeda..7b57ad11ca15 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -1404,9 +1404,14 @@ static int samsung_i2s_probe(struct platform_device 
*pdev)
        pm_runtime_enable(&pdev->dev);
 
        ret = i2s_register_clock_provider(pdev);
-       if (!ret)
-               return 0;
+       if (ret < 0)
+               goto err_disable_pm;
+
+       pri_dai->op_clk = clk_get_parent(pri_dai->clk_table[CLK_I2S_RCLK_SRC]);
+
+       return 0;
 
+err_disable_pm:
        pm_runtime_disable(&pdev->dev);
 err_disable_clk:
        clk_disable_unprepare(pri_dai->clk);
-- 
2.14.2

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