On 02/12/2018 07:17 PM, Florian Fainelli wrote: > On 02/12/2018 04:10 PM, Timur Tabi wrote: >> On 02/12/2018 05:57 PM, Florian Fainelli wrote: >>> That is debatable, is there a good publicly available table of what the >>> typical L1 cache line size is on ARMv8 platforms?
With a server hat on... There are many ARMv8 server platforms that do 64b today, but future designs are likely to head toward 128b (for a variety of reasons). Many of the earlier designs were 64b because that's what certain other arches were using in their server cores. I doubt Vulcan will remain a unique and special case for very long. On the CCIX side of things, I've been trying to push people to go with 128b lines in future designs too. Jon.