On Mon, Feb 12, 2018 at 02:20:31PM -0800, [email protected] wrote:
> @@ -1389,8 +1456,22 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs 
> *iregs)
>  
>       ds->pebs_index = ds->pebs_buffer_base;
>  
> -     if (unlikely(base >= top))
> +     if (unlikely(base >= top)) {
> +             /*
> +              * The drain_pebs() could be called twice in a short period
> +              * for auto-reload event in pmu::read(). There are no
> +              * overflows have happened in between.
> +              * It needs to call intel_pmu_save_and_restart_reload() to
> +              * update the event->count for this case.
> +              */
> +             for_each_set_bit(bit, (unsigned long *)&cpuc->pebs_enabled,
> +                              x86_pmu.max_pebs_events) {
> +                     event = cpuc->events[bit];
> +                     if (event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD)
> +                             intel_pmu_save_and_restart_reload(event, 0);
> +             }
>               return;
> +     }
>  
>       for (at = base; at < top; at += x86_pmu.pebs_record_size) {
>               struct pebs_record_nhm *p = at;

Is there a reason you didn't do intel_pmu_drain_pebs_core() ?


--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -1435,8 +1435,11 @@ static void intel_pmu_drain_pebs_core(st
                return;
 
        n = top - at;
-       if (n <= 0)
+       if (n <= 0) {
+               if (event->hw.flags & PERF_X86_EVENT_AUTO_RELOAD)
+                       intel_pmu_save_and_restart_reload(event, 0);
                return;
+       }
 
        __intel_pmu_pebs_event(event, iregs, at, top, 0, n);
 }

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