On Wed, Feb 21, 2018 at 08:49:43AM -0800, Ashok Raj wrote:
> Microcode updates can be safer if the caches are clean.
> Some of the issues around in certain Broadwell parts
> can be addressed by doing a full cache flush.
Take that text...
>
> Signed-off-by: Ashok Raj <ashok....@intel.com>
> Cc: X86 ML <x...@kernel.org>
> Cc: LKML <linux-kernel@vger.kernel.org>
> Cc: Thomas Gleixner <t...@linutronix.de>
> Cc: Ingo Molnar <mi...@kernel.org>
> Cc: Tony Luck <tony.l...@intel.com>
> Cc: Andi Kleen <andi.kl...@intel.com>
> Cc: Boris Petkov <b...@suse.de>
> Cc: Tom Lendacky <thomas.lenda...@amd.com>
> Cc: Arjan Van De Ven <arjan.van.de....@intel.com>
> ---
> arch/x86/kernel/cpu/microcode/intel.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/microcode/intel.c
> b/arch/x86/kernel/cpu/microcode/intel.c
> index eff80df..5d32724 100644
> --- a/arch/x86/kernel/cpu/microcode/intel.c
> +++ b/arch/x86/kernel/cpu/microcode/intel.c
> @@ -589,6 +589,7 @@ static int apply_microcode_early(struct ucode_cpu_info
> *uci, bool early)
> if (!mc)
> return 0;
>
... and put it here as a comment.
> + wbinvd();
This definitely needs to be native_wbinvd(). Early mode don't love pvops.
> /* write microcode via MSR 0x79 */
> native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
>
> @@ -805,6 +806,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
> return UCODE_OK;
> }
Ditto.
> + wbinvd();
> /* write microcode via MSR 0x79 */
> wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
>
> --
> 2.7.4
>
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284
(AG Nürnberg)
--
