On 03/05/2018 11:04 PM, Ingo Molnar wrote: > * H. Peter Anvin <h...@zytor.com> wrote: >> On NX-enabled hardware NX works with PDE, but the PDPDT in general doesn't >> have permission bits (it's really more of a set of four CR3s than a page >> table level.) > The 4 PDPDT entries are also shadowed in the CPU and are only refreshed > on CR3 loads, not spontaneously reloaded from memory during TLB walk > like regular page table entries, right?
Yes. The SDM even calls them non-architectural "PDPTE Registers" and talks about them only being loaded at CR3 write time. ~5 years ago we even had a bug directly related to this feature: > https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/?id=324cdc3f7e6a752fe0e95fa7b5c9664171a34ded
