From: Maxime Ripard <maxime.rip...@free-electrons.com>

The A33 has a MIPI-DSI block, along with its D-PHY. Let's add it in order
to use it in the relevant boards.

Signed-off-by: Maxime Ripard <maxime.rip...@free-electrons.com>
---
 arch/arm/boot/dts/sun8i-a33.dtsi | 44 +++++++++++++++++++++++++++++++++-
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 50eb84fa246a..94cfa7b1bbfa 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -236,6 +236,11 @@
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        reg = <1>;
+
+                                       tcon0_out_dsi0: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = 
<&dsi0_in_tcon0>;
+                                       };
                                };
                        };
                };
@@ -280,6 +285,45 @@
                        #io-channel-cells = <0>;
                };
 
+               dsi0: dsi@1ca0000 {
+                       compatible = "allwinner,sun6i-a31-mipi-dsi";
+                       reg = <0x01ca0000 0x1000>;
+                       interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_MIPI_DSI>,
+                                <&ccu CLK_DSI_SCLK>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_MIPI_DSI>;
+                       phys = <&dphy0>;
+                       phy-names = "dphy";
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <0>;
+
+                                       dsi0_in_tcon0: endpoint {
+                                               remote-endpoint = 
<&tcon0_out_dsi0>;
+                                       };
+                               };
+                       };
+               };
+
+               dphy0: d-phy@1ca1000 {
+                       compatible = "allwinner,sun6i-a31-mipi-dphy";
+                       reg = <0x01ca1000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MIPI_DSI>,
+                                <&ccu CLK_DSI_DPHY>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_MIPI_DSI>;
+                       status = "disabled";
+                       #phy-cells = <0>;
+               };
+
                fe0: display-frontend@1e00000 {
                        compatible = "allwinner,sun8i-a33-display-frontend";
                        reg = <0x01e00000 0x20000>;
-- 
git-series 0.9.1

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