On 28.02.18 02:52:20, Jayachandran C wrote:
> According to SBSA spec v3.1 section 5.3:
>   All registers are 32 bits in size and should be accessed using
>   32-bit reads and writes. If an access size other than 32 bits
>   is used then the results are IMPLEMENTATION DEFINED.
>   [...]
>   The Generic Watchdog is little-endian
> The current code uses readq to read the watchdog compare register
> which does a 64-bit access. This fails on ThunderX2 which does not
> implement 64-bit access to this register.
> Fix this by using lo_hi_readq() that does two 32-bit reads.
> Signed-off-by: Jayachandran C <jn...@caviumnetworks.com>

Reviewed-by: Robert Richter <rrich...@cavium.com>

I have looked into the non-atomic use of the register access and it
looks sane as the WCV register is only incremented by hardware. There
is no concurrent (write) access from the kernel.


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