On Wed, Mar 7, 2018 at 1:47 PM, Ivan Gorinov <ivan.gori...@intel.com> wrote: > Current x86 Device Tree implementation does not support multiprocessing. > Add new "intel,apic-id" property to allow using CPU descriptions > in Device Tree data provided by the U-Boot loader. > Address specified in 'reg' to be used as default local APIC ID > to avoid breaking existing systems with DTB provided by firmware.
Is there some reason to not always use reg? For when the numbering of cpus and timers is different? Of course, we do have the situation on ARM with the GIC that the GIC CPU IDs may be > > Signed-off-by: Ivan Gorinov <ivan.gori...@intel.com> > --- > Documentation/devicetree/bindings/x86/ce4100.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt > b/Documentation/devicetree/bindings/x86/ce4100.txt > index b49ae59..d15de48 100644 > --- a/Documentation/devicetree/bindings/x86/ce4100.txt > +++ b/Documentation/devicetree/bindings/x86/ce4100.txt > @@ -14,11 +14,17 @@ The CPU node > compatible = "intel,ce4100"; > reg = <0>; > lapic = <&lapic0>; Isn't this enough? I can't tell because whatever this points to has no binding documentation. You could perhaps extend it and add a cell with the id value. > + intel,apic-id = <0>; > }; > > The reg property describes the CPU number. The lapic property points to > the local APIC timer. > > +Optional properties: > + > +- intel,apic-id: local APIC ID. > + The address specified in "reg" is used as default local APIC ID. > + > The SoC node > ------------ > > -- > 2.7.4 >