Commit-ID:  a403d798182f4f7be5e9bab56cfa37e9828fd92a
Gitweb:     https://git.kernel.org/tip/a403d798182f4f7be5e9bab56cfa37e9828fd92a
Author:     Kirill A. Shutemov <kirill.shute...@linux.intel.com>
AuthorDate: Mon, 26 Feb 2018 21:04:47 +0300
Committer:  Ingo Molnar <mi...@kernel.org>
CommitDate: Mon, 12 Mar 2018 09:29:24 +0100

x86/boot/compressed/64: Describe the logic behind the LA57 check

The patch explains the LA57 check in more details.

Tested-by: Borislav Petkov <b...@suse.de>
Signed-off-by: Kirill A. Shutemov <kirill.shute...@linux.intel.com>
Cc: Andy Lutomirski <l...@amacapital.net>
Cc: Andy Shevchenko <andy.shevche...@gmail.com>
Cc: Cyrill Gorcunov <gorcu...@openvz.org>
Cc: Eric Biederman <ebied...@xmission.com>
Cc: H. Peter Anvin <h...@zytor.com>
Cc: Juergen Gross <jgr...@suse.com>
Cc: Kees Cook <keesc...@chromium.org>
Cc: Linus Torvalds <torva...@linux-foundation.org>
Cc: Matthew Wilcox <wi...@infradead.org>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Thomas Gleixner <t...@linutronix.de>
Cc: linux...@kvack.org
Link: 
http://lkml.kernel.org/r/20180226180451.86788-2-kirill.shute...@linux.intel.com
Signed-off-by: Ingo Molnar <mi...@kernel.org>
---
 arch/x86/boot/compressed/pgtable_64.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/arch/x86/boot/compressed/pgtable_64.c 
b/arch/x86/boot/compressed/pgtable_64.c
index 3f1697fcc7a8..45c76eff2718 100644
--- a/arch/x86/boot/compressed/pgtable_64.c
+++ b/arch/x86/boot/compressed/pgtable_64.c
@@ -18,10 +18,22 @@ struct paging_config paging_prepare(void)
 {
        struct paging_config paging_config = {};
 
-       /* Check if LA57 is desired and supported */
-       if (IS_ENABLED(CONFIG_X86_5LEVEL) && native_cpuid_eax(0) >= 7 &&
-                       (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
+       /*
+        * Check if LA57 is desired and supported.
+        *
+        * There are two parts to the check:
+        *   - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y
+        *   - if the machine supports 5-level paging:
+        *     + CPUID leaf 7 is supported
+        *     + the leaf has the feature bit set
+        *
+        * That's substitute for boot_cpu_has() in early boot code.
+        */
+       if (IS_ENABLED(CONFIG_X86_5LEVEL) &&
+                       native_cpuid_eax(0) >= 7 &&
+                       (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) 
{
                paging_config.l5_required = 1;
+       }
 
        return paging_config;
 }

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