On 2018-02-28 04:28, Andy Gross wrote:
On Sat, Feb 03, 2018 at 01:28:11PM +0530, Abhishek Sahu wrote:


@@ -841,20 +856,12 @@ static int qup_i2c_bam_do_xfer(struct qup_i2c_dev *qup, struct i2c_msg *msg,
                        goto desc_err;

-               if (rx_buf)
-                       writel(QUP_BAM_INPUT_EOT,
-                              qup->base + QUP_OUT_FIFO_BASE);
-               writel(QUP_BAM_FLUSH_STOP, qup->base + QUP_OUT_FIFO_BASE);

                /* wait for remaining interrupts to occur */
                if (!wait_for_completion_timeout(&qup->xfer, HZ))
                        dev_err(qup->dev, "flush timed out\n");

-               qup_i2c_rel_dma(qup);

So this really only works due to the previous patch that adds the flush/eot tags to all of the read messages. If the answer to the previous question is that only the last read message gets the eot/flush, then this code needs to remain in
place.  Otherwise, it's fine.


  Thanks Andy,

  We need to schedule EOT/FLUSH after last message.
  For following transfer

  READ, READ, WRITE (FLUSH + EOT tags after that)

In this case, FLUSH will clear all the descriptors till WRITE and trigger TX
  completion. EOT will be copied in RX FIFO and trigger RX completion.


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