Set the "reg" property to the processor's local APIC ID.
Local APIC ID is assigned by hardware and may differ from CPU number.
Signed-off-by: Ivan Gorinov <ivan.gori...@intel.com>
---
Documentation/devicetree/bindings/x86/ce4100.txt | 38 ++++++++++++++++++------
1 file changed, 29 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt
b/Documentation/devicetree/bindings/x86/ce4100.txt
index b49ae59..5a4bd83 100644
--- a/Documentation/devicetree/bindings/x86/ce4100.txt
+++ b/Documentation/devicetree/bindings/x86/ce4100.txt
@@ -7,17 +7,37 @@ Many of the "generic" devices like HPET or IO APIC have the
ce4100
name in their compatible property because they first appeared in this
SoC.
-The CPU node
-------------
- cpu@0 {
- device_type = "cpu";
- compatible = "intel,ce4100";
- reg = <0>;
- lapic = <&lapic0>;
+The CPU nodes
+-------------
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0x00>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0x02>;
+ };
};
-The reg property describes the CPU number. The lapic property points to
-the local APIC timer.
+A "cpu" node describes one logical processor (hardware thread).
+
+Required properties:
+
+- device_type
+ Device type, must be "cpu".
+
+- reg
+ Local APIC ID, a unique number assigned to each processor by
+ hardware. This ID is used to specify the destination of interrupt
+ messages with "physical" destination mode, including startup IPI.
The SoC node
------------
--
2.7.4
