> -----Original Message----- > From: Luck, Tony <[email protected]> > Sent: Monday, March 26, 2018 4:28 PM > To: Borislav Petkov <[email protected]> > Cc: Ghannam, Yazen <[email protected]>; linux- > [email protected]; [email protected]; [email protected] > Subject: Re: [PATCH 2/2] x86/MCE: Always save MCA_{ADDR,MISC,SYND} > register contents > > On Mon, Mar 26, 2018 at 10:09:55PM +0200, Borislav Petkov wrote: > > On Mon, Mar 26, 2018 at 08:05:37PM +0000, Ghannam, Yazen wrote: > > > Sure, I can do that. But I didn't think it was necessary because it > > > doesn't > hurt > > > to read the registers whether or not the valid bits are set. > > > > No, this needs to be AMD-specific because it will confuse people using > > Intel machines. > > Worse than confusion it may even cause a crash on Intel. Quoting the > Intel SDM: > > 15.3.2.3 IA32_MCi_ADDR MSRs > > The IA32_MCi_ADDR MSR contains the address of the code or data memory > location that produced the machine- check error if the ADDRV flag in > the IA32_MCi_STATUS register is set (see Section 15-7, “IA32_MCi_ADDR > MSR”). The IA32_MCi_ADDR register is either not implemented or > contains no address if the ADDRV flag in the IA32_MCi_STATUS register > is clear. When not implemented in the processor, all reads and writes > to this MSR will cause a general protection exception. > > Ditto for the MISC register. Please don't read them unless > the ADDRV/MISCV bits are set in the corresponding STATUS > register. >
Okay, then we won't do this. On AMD, the registers are implemented if MCA is implemented. They'll just be read-as-zero if not available for some reason. Thanks, Yazen
