> -----Original Message----- > From: Bjorn Helgaas [mailto:[email protected]] > Sent: Tuesday, April 03, 2018 7:06 AM > To: Jacob Keller <[email protected]> > Cc: Tal Gilboa <[email protected]>; Tariq Toukan <[email protected]>; > Keller, Jacob E <[email protected]>; Ariel Elior > <[email protected]>; > Ganesh Goudar <[email protected]>; Kirsher, Jeffrey T > <[email protected]>; [email protected]; intel-wired- > [email protected]; [email protected]; [email protected]; > [email protected] > Subject: Re: [PATCH v5 03/14] PCI: Add pcie_bandwidth_capable() to compute > max supported link bandwidth > > On Mon, Apr 02, 2018 at 05:30:54PM -0700, Jacob Keller wrote: > > On Mon, Apr 2, 2018 at 7:05 AM, Bjorn Helgaas <[email protected]> wrote: > > > +/* PCIe speed to Mb/s reduced by encoding overhead */ > > > +#define PCIE_SPEED2MBS_ENC(speed) \ > > > + ((speed) == PCIE_SPEED_16_0GT ? (16000*(128/130)) : \ > > > + (speed) == PCIE_SPEED_8_0GT ? (8000*(128/130)) : \ > > > + (speed) == PCIE_SPEED_5_0GT ? (5000*(8/10)) : \ > > > + (speed) == PCIE_SPEED_2_5GT ? (2500*(8/10)) : \ > > > + 0) > > > + > > > > Should this be "(speed * x ) / y" instead? wouldn't they calculate > > 128/130 and truncate that to zero before multiplying by the speed? Or > > are compilers smart enough to do this the other way to avoid the > > losses? > > Yep, thanks for saving me yet more embarrassment.
That's what patch review is for :D Thanks, Jake
