From: Adrian Hunter <adrian.hun...@intel.com>

[ Upstream commit 38b65b0891dc129dc0a5ce148a21c481e667b395 ]

CBR (core-to-bus ratio) packets provide an indication of CPU frequency. A
more accurate measure can be made by counting the cycles (given by CYC
packets) in between other timing packets (either MTC or TSC). Using TSC
packets has at least 2 issues: 1) timing might have stopped (e.g. mwait) or
2) TSC packets within PSB+ might slip past CYC packets. For now, simply do
not use TSC packets for calculating CPU cycles to TSC. That leaves the case
where 2 MTC packets are used, otherwise falling back to the CBR value.

Signed-off-by: Adrian Hunter <adrian.hun...@intel.com>
Cc: Andi Kleen <a...@linux.intel.com>
Link: 
http://lkml.kernel.org/r/1495786658-18063-37-git-send-email-adrian.hun...@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <a...@redhat.com>
Signed-off-by: Sasha Levin <alexander.le...@microsoft.com>
---
 tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c 
b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index eeeae0629ad3..fbfe97dcdaf0 100644
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -696,6 +696,12 @@ static int intel_pt_calc_cyc_cb(struct intel_pt_pkt_info 
*pkt_info)
                break;
 
        case INTEL_PT_TSC:
+               /*
+                * For now, do not support using TSC packets - refer
+                * intel_pt_calc_cyc_to_tsc().
+                */
+               if (data->from_mtc)
+                       return 1;
                timestamp = pkt_info->packet.payload |
                            (data->timestamp & (0xffULL << 56));
                if (data->from_mtc && timestamp < data->timestamp &&
@@ -808,6 +814,14 @@ static void intel_pt_calc_cyc_to_tsc(struct 
intel_pt_decoder *decoder,
                .cbr_cyc_to_tsc = 0,
        };
 
+       /*
+        * For now, do not support using TSC packets for at least the reasons:
+        * 1) timing might have stopped
+        * 2) TSC packets within PSB+ can slip against CYC packets
+        */
+       if (!from_mtc)
+               return;
+
        intel_pt_pkt_lookahead(decoder, intel_pt_calc_cyc_cb, &data);
 }
 
-- 
2.15.1

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