From: Sean Wang <sean.w...@mediatek.com>

Add MT7623N reference board with eMMC. On the board, there is additional
external PHY ICPlus IP1001 transceiver available by port 5 on the MDIO
bus connectted with GMAC2.

Signed-off-by: Sean Wang <sean.w...@mediatek.com>
Suggested-by: Ryder Lee <ryder....@mediatek.com>
---
 arch/arm/boot/dts/Makefile             |   1 +
 arch/arm/boot/dts/mt7623.dtsi          |  17 ++
 arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 326 +++++++++++++++++++++++++++++++++
 3 files changed, 344 insertions(+)
 create mode 100644 arch/arm/boot/dts/mt7623n-rfb-emmc.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bc33a3c..19013d4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1152,6 +1152,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
        mt6592-evb.dtb \
        mt7623a-rfb-emmc.dtb \
        mt7623a-rfb-nand.dtb \
+       mt7623n-rfb-emmc.dtb \
        mt7623n-rfb-nand.dtb \
        mt7623n-bananapi-bpi-r2.dtb \
        mt8127-moose.dtb \
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index f84c37b..d1eb123 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -968,6 +968,14 @@
                };
        };
 
+       i2c2_pins_a: i2c2-default {
+               pin-i2c2 {
+                       pinmux = <MT7623_PIN_77_SDA2_FUNC_SDA2>,
+                                <MT7623_PIN_78_SCL2_FUNC_SCL2>;
+                       bias-disable;
+               };
+       };
+
        i2c2_pins_b: i2c2-alt {
                pin-i2c2 {
                        pinmux = <MT7623_PIN_122_GPIO122_FUNC_SDA2>,
@@ -1185,6 +1193,15 @@
                };
        };
 
+       spi2_pins_a: spi2-default {
+               pins-spi {
+                       pinmux = <MT7623_PIN_101_SPI2_CSN_FUNC_SPI2_CS>,
+                                <MT7623_PIN_104_SPI2_CK_FUNC_SPI2_CK>,
+                                <MT7623_PIN_102_SPI2_MI_FUNC_SPI2_MI>,
+                                <MT7623_PIN_103_SPI2_MO_FUNC_SPI2_MO>;
+               };
+       };
+
        uart0_pins_a: uart0-default {
                pins-dat {
                        pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
diff --git a/arch/arm/boot/dts/mt7623n-rfb-emmc.dts 
b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
new file mode 100644
index 0000000..b760613
--- /dev/null
+++ b/arch/arm/boot/dts/mt7623n-rfb-emmc.dts
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018 MediaTek Inc.
+ * Author: Sean Wang <sean.w...@mediatek.com>
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include "mt7623.dtsi"
+#include "mt6323.dtsi"
+
+/ {
+       model = "MediaTek MT7623N with eMMC reference board";
+       compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
+
+       aliases {
+               serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+       };
+
+       chosen {
+               stdout-path = "serial2:115200n8";
+       };
+
+       cpus {
+               cpu@0 {
+                       proc-supply = <&mt6323_vproc_reg>;
+               };
+
+               cpu@1 {
+                       proc-supply = <&mt6323_vproc_reg>;
+               };
+
+               cpu@2 {
+                       proc-supply = <&mt6323_vproc_reg>;
+               };
+
+               cpu@3 {
+                       proc-supply = <&mt6323_vproc_reg>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&key_pins_a>;
+
+               factory {
+                       label = "factory";
+                       linux,code = <BTN_0>;
+                       gpios = <&pio 256 GPIO_ACTIVE_LOW>;
+               };
+
+               wps {
+                       label = "wps";
+                       linux,code = <KEY_WPS_BUTTON>;
+                       gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0 0x80000000 0 0x40000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       sound {
+               compatible = "mediatek,mt2701-wm8960-machine";
+               mediatek,platform = <&afe>;
+               audio-routing =
+                       "Headphone", "HP_L",
+                       "Headphone", "HP_R",
+                       "LINPUT1", "AMIC",
+                       "RINPUT1", "AMIC";
+               mediatek,audio-codec = <&wm8960>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&i2s0_pins_a>;
+       };
+};
+
+&btif {
+       status = "okay";
+};
+
+&cir {
+       pinctrl-names = "default";
+       pinctrl-0 = <&cir_pins_a>;
+       status = "okay";
+};
+
+&crypto {
+       status = "okay";
+};
+
+&eth {
+       status = "okay";
+
+       gmac0: mac@0 {
+               compatible = "mediatek,eth-mac";
+               reg = <0>;
+               phy-mode = "trgmii";
+
+               fixed-link {
+                       speed = <1000>;
+                       full-duplex;
+                       pause;
+               };
+       };
+
+       mac@1 {
+               compatible = "mediatek,eth-mac";
+               reg = <1>;
+               phy-handle = <&phy5>;
+       };
+
+       mdio-bus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               phy5: ethernet-phy@5 {
+                       reg = <5>;
+                       phy-mode = "rgmii-rxid";
+               };
+
+               switch@0 {
+                       compatible = "mediatek,mt7530";
+                       reg = <0>;
+                       reset-gpios = <&pio 33 0>;
+                       core-supply = <&mt6323_vpa_reg>;
+                       io-supply = <&mt6323_vemc3v3_reg>;
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       label = "lan0";
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       label = "lan1";
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                                       label = "lan2";
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                                       label = "lan3";
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                                       label = "wan";
+                               };
+
+                               port@6 {
+                                       reg = <6>;
+                                       label = "cpu";
+                                       ethernet = <&gmac0>;
+                                       phy-mode = "trgmii";
+
+                                       fixed-link {
+                                               speed = <1000>;
+                                               full-duplex;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c0_pins_a>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins_b>;
+       status = "okay";
+
+       wm8960: wm8960@1a {
+               compatible = "wlf,wm8960";
+               reg = <0x1a>;
+       };
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c2_pins_a>;
+       status = "okay";
+};
+
+&mmc0 {
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc0_pins_default>;
+       pinctrl-1 = <&mmc0_pins_uhs>;
+       status = "okay";
+       bus-width = <8>;
+       max-frequency = <50000000>;
+       cap-mmc-highspeed;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       non-removable;
+};
+
+&mmc1 {
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc1_pins_default>;
+       pinctrl-1 = <&mmc1_pins_uhs>;
+       status = "okay";
+       bus-width = <4>;
+       max-frequency = <50000000>;
+       cap-sd-highspeed;
+       cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_default>;
+       status = "okay";
+
+       pcie@0,0 {
+               status = "okay";
+       };
+
+       pcie@1,0 {
+               status = "okay";
+       };
+};
+
+&pcie0_phy {
+       status = "okay";
+};
+
+&pcie1_phy {
+       status = "okay";
+};
+
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins_a>;
+       status = "okay";
+};
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_pins_a>;
+       status = "okay";
+};
+
+&spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi1_pins_a>;
+       status = "okay";
+};
+
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi2_pins_a>;
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_a>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins_a>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins_a>;
+       status = "okay";
+};
+
+&usb1 {
+       vusb33-supply = <&reg_3p3v>;
+       vbus-supply = <&reg_5v>;
+       status = "okay";
+};
+
+&u3phy1 {
+       status = "okay";
+};
-- 
2.7.4

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