On 04/05/18 20:05, Mylène Josserand wrote: > The CNTVOFF register from arch timer is uninitialized. > It should be done by the bootloader but it is currently not the case, > even for boot CPU because this SoC is booting in secure mode. > It leads to an random offset value meaning that each CPU will have a > different time, which isn't working very well. > > Add assembly code used for boot CPU and secondary CPU cores to make > sure that the CNTVOFF register is initialized. Because this code can > be used by different platforms, add this assembly file in ARM's common > folder. > > Signed-off-by: Mylène Josserand <[email protected]> > Reviewed-by: Geert Uytterhoeven <[email protected]> > Tested-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Marc Zyngier <[email protected]> M. -- Jazz is not dead. It just smells funny...
