The order of the set and mask operation in sm501_init_reg()
was setting and then masking the bits set. Correct the order
so that we do not end up with 288MHz SDRAM clocks on certain
systems.
Signed-off-by: Ben Dooks <[EMAIL PROTECTED]>
Index: linux-2.6.21-quilt8/drivers/mfd/sm501.c
===================================================================
--- linux-2.6.21-quilt8.orig/drivers/mfd/sm501.c 2007-06-07
12:13:03.000000000 +0100
+++ linux-2.6.21-quilt8/drivers/mfd/sm501.c 2007-06-07 12:13:06.000000000
+0100
@@ -803,6 +803,9 @@ static DEVICE_ATTR(dbg_regs, 0666, sm501
/* sm501_init_reg
*
* Helper function for the init code to setup a register
+ *
+ * clear the bits which are set in r->mask, and then set
+ * the bits set in r->set.
*/
static inline void sm501_init_reg(struct sm501_devdata *sm,
@@ -812,8 +815,8 @@ static inline void sm501_init_reg(struct
unsigned long tmp;
tmp = readl(sm->regs + reg);
- tmp |= r->set;
tmp &= ~r->mask;
+ tmp |= r->set;
writel(tmp, sm->regs + reg);
}
--
Ben ([EMAIL PROTECTED], http://www.fluff.org/)
'a smiley only costs 4 bytes'
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