After an interrupt has been acknowledged, mask the IRQ priority through PMR and clear PSR.I bit, allowing higher priority interrupts to be received during interrupt handling.
Signed-off-by: Julien Thierry <[email protected]> Cc: Russell King <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Marc Zyngier <[email protected]> --- arch/arm/include/asm/arch_gicv3.h | 6 ++++++ arch/arm64/include/asm/arch_gicv3.h | 6 ++++++ drivers/irqchip/irq-gic-v3.c | 8 +++++++- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch_gicv3.h b/arch/arm/include/asm/arch_gicv3.h index 58d5d3e..b39d620 100644 --- a/arch/arm/include/asm/arch_gicv3.h +++ b/arch/arm/include/asm/arch_gicv3.h @@ -368,5 +368,11 @@ static inline bool gic_prio_masking_enabled(void) return false; } +static inline void gic_start_pmr_masking(void) +{ + /* Should not get called */ + WARN_ON(true); +} + #endif /* !__ASSEMBLY__ */ #endif /* !__ASM_ARCH_GICV3_H */ diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 98b09db..23c88ac0 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -160,5 +160,11 @@ static inline bool gic_prio_masking_enabled(void) return cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING); } +static inline void gic_start_pmr_masking(void) +{ + gic_write_pmr(ICC_PMR_EL1_MASKED); + asm volatile ("msr daifclr, #2" : : : "memory"); +} + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARCH_GICV3_H */ diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index fc477e2..2fd0440 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -355,12 +355,18 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs irqnr = gic_read_iar(); + if (arch_uses_gic_prios()) { + isb(); + /* Masking IRQs earlier would prevent to ack the current interrupt */ + gic_start_pmr_masking(); + } + if (likely(irqnr > 15 && irqnr < 1020) || irqnr >= 8192) { int err; if (static_branch_likely(&supports_deactivate_key)) gic_write_eoir(irqnr); - else + else if (!arch_uses_gic_prios()) isb(); err = handle_domain_irq(gic_data.domain, irqnr, regs); -- 1.9.1
