4.4-stable review patch. If anyone has any objections, please let me know.
------------------ From: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> commit 0cc5fa00b0a88dad140b4e5c2cead9951ad36822 upstream Add the CPU feature bit CPUID.7.0.EDX[31] which indicates whether the CPU supports Reduced Data Speculation. [ tglx: Split it out from a later patch ] Signed-off-by: Konrad Rzeszutek Wilk <konrad.w...@oracle.com> Signed-off-by: Thomas Gleixner <t...@linutronix.de> Reviewed-by: Ingo Molnar <mi...@kernel.org> Signed-off-by: David Woodhouse <d...@amazon.co.uk> Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org> Signed-off-by: Srivatsa S. Bhat <sriva...@csail.mit.edu> Reviewed-by: Matt Helsley (VMware) <matt.hels...@gmail.com> Reviewed-by: Alexey Makhalov <amakha...@vmware.com> Reviewed-by: Bo Gan <g...@vmware.com> Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org> --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -297,6 +297,7 @@ #define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */ #define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */ #define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */ +#define X86_FEATURE_RDS (18*32+31) /* Reduced Data Speculation */ /* * BUG word(s)
