Quoting Aapo Vienamo (2018-07-12 04:53:01) > From: Peter De-Schrijver <[email protected]> > > Add a clock type to model the sdmmc switch divider clocks which have paths > to source clocks bypassing the divider (Low Jitter paths). These > are handled by selecting the lj path when the divider is 1 (ie the > rate is the parent rate), otherwise the normal path with divider > will be selected. Otherwise this clock behaves as a normal peripheral > clock. > > Signed-off-by: Peter De-Schrijver <[email protected]> > Signed-off-by: Aapo Vienamo <[email protected]> > Acked-by: Peter De Schrijver <[email protected]> > ---
Applied to clk-next
