On 20.07.2018 18:34, Marcel Ziswiler wrote: > From: Marcel Ziswiler <[email protected]> > > Commit 6c468f109884 ("ARM: dts: tegra: add Tegra20 NAND flash > controller node") introduced the nand-controller node. However, it got > added at the wrong spot not honoring the address order. Fix this. > > Signed-off-by: Marcel Ziswiler <[email protected]>
Reviewed-by: Stefan Agner <[email protected]> > > --- > > arch/arm/boot/dts/tegra20.dtsi | 26 +++++++++++++------------- > 1 file changed, 13 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi > index 979f38293fe5..a22c6a8f8f83 100644 > --- a/arch/arm/boot/dts/tegra20.dtsi > +++ b/arch/arm/boot/dts/tegra20.dtsi > @@ -419,19 +419,6 @@ > status = "disabled"; > }; > > - gmi@70009000 { > - compatible = "nvidia,tegra20-gmi"; > - reg = <0x70009000 0x1000>; > - #address-cells = <2>; > - #size-cells = <1>; > - ranges = <0 0 0xd0000000 0xfffffff>; > - clocks = <&tegra_car TEGRA20_CLK_NOR>; > - clock-names = "gmi"; > - resets = <&tegra_car 42>; > - reset-names = "gmi"; > - status = "disabled"; > - }; > - > nand-controller@70008000 { > compatible = "nvidia,tegra20-nand"; > reg = <0x70008000 0x100>; > @@ -447,6 +434,19 @@ > status = "disabled"; > }; > > + gmi@70009000 { > + compatible = "nvidia,tegra20-gmi"; > + reg = <0x70009000 0x1000>; > + #address-cells = <2>; > + #size-cells = <1>; > + ranges = <0 0 0xd0000000 0xfffffff>; > + clocks = <&tegra_car TEGRA20_CLK_NOR>; > + clock-names = "gmi"; > + resets = <&tegra_car 42>; > + reset-names = "gmi"; > + status = "disabled"; > + }; > + > pwm: pwm@7000a000 { > compatible = "nvidia,tegra20-pwm"; > reg = <0x7000a000 0x100>;
