On Mon, Sep 17, 2018 at 8:35 PM Thomas Gleixner <t...@linutronix.de> wrote: > > On Mon, 17 Sep 2018, Christoph Hellwig wrote: > > > Just for the record, this would be the first (architected) timer ever > > > which > > > just works. I'm having a hard time to believe this, but I'd certainly > > > welcome it. > > > > And that would be the contact with reality. > > I've dealt with the reality of timers for a long time ....
I think the problem is we don't have separate DT node for RISC-V timer. Instead, we have been probing timer for each CPU DT node. Ideally, we should have one DT node for RISC-V timer and the DT should should also describe the local interrupts to be used for RISC-V timer. Regards, Anup
