* Tim Chen <[email protected]> wrote:
> From: Thomas Lendacky <[email protected]> > > We extend the app to app spectre v2 mitigation using STIBP > to the AMD cpus. We need to take care of special s/to the AMD cpus /to AMD CPUs > cases for AMD cpu's update of SPEC_CTRL MSR to avoid double > writing of MSRs from update to SSBD and STIBP. s/AMD cpu /AMD CPU > > Originally-by: Thomas Lendacky <[email protected]> > Signed-off-by: Tim Chen <[email protected]> > --- > arch/x86/kernel/process.c | 48 > +++++++++++++++++++++++++++++++++++++---------- > 1 file changed, 38 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c > index cb24014..4a3a672 100644 > --- a/arch/x86/kernel/process.c > +++ b/arch/x86/kernel/process.c > @@ -399,6 +399,10 @@ static __always_inline void set_spec_ctrl_state(unsigned > long tifn) > { > u64 msr = x86_spec_ctrl_base; > > + /* > + * AMD cpu may have used a different method to update SSBD, so > + * we need to be sure we are using the SPEC_CTRL MSR for SSBD. s/AMD cpu may have used a different method to update SSBD /AMD CPUs may use a different method to update the SSBD Thanks, Ingo
