On Tue, Oct 2, 2018 at 3:28 PM Ard Biesheuvel <ard.biesheu...@linaro.org> wrote: > > On 2 October 2018 at 15:20, Jason A. Donenfeld <ja...@zx2c4.com> wrote: > > The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC, > > which is pretty much an ARMv4 device, except its bus will choke on the > > half-words. The way to make the C compiler not output ldrh/strh is with > > -march=armv3, which doesn't support them in the ISA. However, this > > prevents certain cryptography code from working that uses instructions > > like umull. Fortunately there's also -march=armv3m that does support > > those, making it possible to continue assembling optimized cryptography > > routines for our beloved RiscPC. > > > > Signed-off-by: Jason A. Donenfeld <ja...@zx2c4.com> > > Cc: Ard Biesheuvel <ard.biesheu...@linaro.org> > > Cc: Russell King <li...@armlinux.org.uk> > > Cc: Arnd Bergmann <a...@arndb.de> > > Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Acked-by: Arnd Bergmann <a...@arndb.de> Please add this to Russell's patch tracker for inclusion at http://www.arm.linux.org.uk/developer/patches/ Arnd
