Fix regression introduced by
commit cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once")
as it added a call to tsc_early_init() which initializes the TSC ADJUST
values before acpi_boot_table_init(). In the case of UV systems,
that is a necessary step thats calls uv_system_init(). This informs
tsc_sanitize_first_cpu() that we're on a platform with async TSC resets
as documented in
commit 341102c3ef29 ("x86/tsc: Add option that TSC on Socket 0 being non-zero
is valid")
Fix by skipping the early tsc initialization on UV systems and let TSC
init tests take place later in tsc_init().
Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once")
Signed-off-by: Mike Travis <[email protected]>
Suggested-by: Hedi Berriche <[email protected]>
Reviewed-by: Russ Anderson <[email protected]>
Reviewed-by: Dimitri Sivanich <[email protected]>
---
arch/x86/kernel/tsc.c | 4 ++++
1 file changed, 4 insertions(+)
--- linux.orig/arch/x86/kernel/tsc.c
+++ linux/arch/x86/kernel/tsc.c
@@ -26,6 +26,7 @@
#include <asm/apic.h>
#include <asm/intel-family.h>
#include <asm/i8259.h>
+#include <asm/uv/uv.h>
unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */
EXPORT_SYMBOL(cpu_khz);
@@ -1433,6 +1434,9 @@ void __init tsc_early_init(void)
{
if (!boot_cpu_has(X86_FEATURE_TSC))
return;
+ /* Don't change UV TSC multi-chassis synchronization */
+ if (is_early_uv_system())
+ return;
if (!determine_cpu_tsc_frequencies(true))
return;
loops_per_jiffy = get_loops_per_jiffy();
--
