> I found that memory latency is difficult to measure in modern x86 > CPUs because they have very clever prefetchers that can often > outwit benchmarks.
A pointer-chasing program that accesses a random sequence of addresses usually can produce a good estimate on memory latency. Also, prefetching can be turned off in BIOS or by modifying the MSRs. > Another trap on P4 is that RDTSC is actually quite slow and synchronizes > the CPU; that can add large measurement errors. > > -Andi The cost can be amortized if the portion of memory accesses is long enough. tong - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
