reviewed-by: Minghuan Lian <minghuan.l...@nxp.com>
> -----Original Message-----
> From: Z.q. Hou
> Sent: Tuesday, November 20, 2018 5:26 PM
> To: linux-...@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org;
> bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> l.subrahma...@mobiveil.co.in; shawn...@kernel.org; Leo Li
> <leoyang...@nxp.com>; lorenzo.pieral...@arm.com;
> catalin.mari...@arm.com; will.dea...@arm.com
> Cc: Mingkai Hu <mingkai...@nxp.com>; M.h. Lian
> <minghuan.l...@nxp.com>; Xiaowei Bao <xiaowei....@nxp.com>; Z.q. Hou
> <zhiqiang....@nxp.com>
> Subject: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/IO
> outbound windows
>
> From: Hou Zhiqiang <zhiqiang....@nxp.com>
>
> It should get PCI base address from the DT node property 'ranges'
> to setup MEM/IO outbound windows instead of always zero.
>
> Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
> Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
> ---
> V2:
> - Added fixes entry.
>
> drivers/pci/controller/pcie-mobiveil.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-mobiveil.c
> b/drivers/pci/controller/pcie-mobiveil.c
> index a0dd337c6214..8ff873023b5f 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie
> *pcie)
>
> /* configure outbound translation window */
> program_ob_windows(pcie, pcie->ob_wins_configured,
> - win->res->start, 0, type,
> - resource_size(win->res));
> + win->res->start,
> + win->res->start - win->offset,
> + type, resource_size(win->res));
> }
>
> /* setup MSI hardware registers */
> --
> 2.17.1
