Hi Lorenzo, Thanks a lot for your comments!
> -----Original Message----- > From: Lorenzo Pieralisi <[email protected]> > Sent: 2018年12月6日 0:02 > To: Z.q. Hou <[email protected]> > Cc: [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected]; Roy Zang <[email protected]>; Mingkai Hu > <[email protected]>; M.h. Lian <[email protected]> > Subject: Re: [PATCHv2 2/4] PCI: dwc: fix 4GiB outbound window size > truncated to zero issue > > On Wed, Nov 07, 2018 at 10:09:10AM +0000, Z.q. Hou wrote: > > From: Hou Zhiqiang <[email protected]> > > > > The current type of mem_size is 'u32', so when resource_size() return > > 4G it will be truncated to zero. This patch fix it by changing its > > type to 'u64'. > > > > Signed-off-by: Hou Zhiqiang <[email protected]> > > Acked-by: Gustavo Pimentel <[email protected]> > > --- > > V2: > > - Reworded the subject. > > > > drivers/pci/controller/dwc/pcie-designware.c | 4 ++-- > > drivers/pci/controller/dwc/pcie-designware.h | 4 ++-- > > 2 files changed, 4 insertions(+), 4 deletions(-) > > I would like to add a Fixes: tag. > > is > > edd45e396829 ("PCI: dwc: designware: Move _unroll configurations to a > separate function") > > the commit you are fixing ? Yes, will add the Fixes, and I think it fixes the original patch: 340cba6092c2 ("pci: Add PCIe driver for Samsung Exynos"). > Thanks, > Lorenzo > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > > b/drivers/pci/controller/dwc/pcie-designware.c > > index 2153956a0b20..7ac5989c23ef 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > @@ -106,7 +106,7 @@ static void dw_pcie_writel_ob_unroll(struct > > dw_pcie *pci, u32 index, u32 reg, > > > > static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int > index, > > int type, u64 cpu_addr, > > - u64 pci_addr, u32 size) > > + u64 pci_addr, u64 size) > > { > > u32 retries, val; > > > > @@ -141,7 +141,7 @@ static void > > dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, } > > > > void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, > > - u64 cpu_addr, u64 pci_addr, u32 size) > > + u64 cpu_addr, u64 pci_addr, u64 size) > > { > > u32 retries, val; > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > > b/drivers/pci/controller/dwc/pcie-designware.h > > index 9f1a5e399b70..a438c3879aa9 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > @@ -153,7 +153,7 @@ struct pcie_port { > > u32 io_size; > > u64 mem_base; > > phys_addr_t mem_bus_addr; > > - u32 mem_size; > > + u64 mem_size; > > struct resource *cfg; > > struct resource *io; > > struct resource *mem; > > @@ -238,7 +238,7 @@ int dw_pcie_link_up(struct dw_pcie *pci); int > > dw_pcie_wait_for_link(struct dw_pcie *pci); void > > dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, > > int type, u64 cpu_addr, u64 pci_addr, > > - u32 size); > > + u64 size); > > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, > > u64 cpu_addr, enum dw_pcie_as_type as_type); void > > dw_pcie_disable_atu(struct dw_pcie *pci, int index, > > -- > > 2.17.1 > > Thanks, Zhiqiang
