Hi,

On 19/12/2018 12:42, Kishon Vijay Abraham I wrote:
> Now that Keystone started using it's own msi_irq_chip, remove
> Keystone specific callback function defined in dw_pcie_host_ops.
> 
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
>  .../pci/controller/dwc/pcie-designware-host.c | 45 ++++++-------------
>  drivers/pci/controller/dwc/pcie-designware.h  |  5 ---
>  2 files changed, 14 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c 
> b/drivers/pci/controller/dwc/pcie-designware-host.c
> index db21bd11f153..dbc94f3be3d5 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -126,18 +126,12 @@ static void dw_pci_setup_msi_msg(struct irq_data *data, 
> struct msi_msg *msg)
>       struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>       u64 msi_target;
>  
> -     if (pp->ops->get_msi_addr)
> -             msi_target = pp->ops->get_msi_addr(pp);
> -     else
> -             msi_target = (u64)pp->msi_data;
> +     msi_target = (u64)pp->msi_data;
>  
>       msg->address_lo = lower_32_bits(msi_target);
>       msg->address_hi = upper_32_bits(msi_target);
>  
> -     if (pp->ops->get_msi_data)
> -             msg->data = pp->ops->get_msi_data(pp, data->hwirq);
> -     else
> -             msg->data = data->hwirq;
> +     msg->data = data->hwirq;
>  
>       dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n",
>               (int)data->hwirq, msg->address_hi, msg->address_lo);
> @@ -157,17 +151,13 @@ static void dw_pci_bottom_mask(struct irq_data *data)
>  
>       raw_spin_lock_irqsave(&pp->lock, flags);
>  
> -     if (pp->ops->msi_clear_irq) {
> -             pp->ops->msi_clear_irq(pp, data->hwirq);
> -     } else {
> -             ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
> -             res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
> -             bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
> +     ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
> +     res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
> +     bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>  
> -             pp->irq_status[ctrl] &= ~(1 << bit);
> -             dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
> -                                 ~pp->irq_status[ctrl]);
> -     }
> +     pp->irq_status[ctrl] &= ~(1 << bit);
> +     dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
> +                         ~pp->irq_status[ctrl]);
>  
>       raw_spin_unlock_irqrestore(&pp->lock, flags);
>  }
> @@ -180,17 +170,13 @@ static void dw_pci_bottom_unmask(struct irq_data *data)
>  
>       raw_spin_lock_irqsave(&pp->lock, flags);
>  
> -     if (pp->ops->msi_set_irq) {
> -             pp->ops->msi_set_irq(pp, data->hwirq);
> -     } else {
> -             ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
> -             res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
> -             bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
> +     ctrl = data->hwirq / MAX_MSI_IRQS_PER_CTRL;
> +     res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
> +     bit = data->hwirq % MAX_MSI_IRQS_PER_CTRL;
>  
> -             pp->irq_status[ctrl] |= 1 << bit;
> -             dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
> -                                 ~pp->irq_status[ctrl]);
> -     }
> +     pp->irq_status[ctrl] |= 1 << bit;
> +     dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
> +                         ~pp->irq_status[ctrl]);
>  
>       raw_spin_unlock_irqrestore(&pp->lock, flags);
>  }
> @@ -209,9 +195,6 @@ static void dw_pci_bottom_ack(struct irq_data *d)
>  
>       dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit);
>  
> -     if (pp->ops->msi_irq_ack)
> -             pp->ops->msi_irq_ack(d->hwirq, pp);
> -
>       raw_spin_unlock_irqrestore(&pp->lock, flags);
>  }
>  
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h 
> b/drivers/pci/controller/dwc/pcie-designware.h
> index 0873ee4084aa..53cb6ab405b5 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -134,14 +134,9 @@ struct dw_pcie_host_ops {
>       int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus,
>                            unsigned int devfn, int where, int size, u32 val);
>       int (*host_init)(struct pcie_port *pp);
> -     void (*msi_set_irq)(struct pcie_port *pp, int irq);
> -     void (*msi_clear_irq)(struct pcie_port *pp, int irq);
> -     phys_addr_t (*get_msi_addr)(struct pcie_port *pp);
> -     u32 (*get_msi_data)(struct pcie_port *pp, int pos);
>       void (*scan_bus)(struct pcie_port *pp);
>       void (*set_num_vectors)(struct pcie_port *pp);
>       int (*msi_host_init)(struct pcie_port *pp);
> -     void (*msi_irq_ack)(int irq, struct pcie_port *pp);
>  };
>  
>  struct pcie_port {
> 

Acked-by: Gustavo Pimentel <[email protected]>

Regards,
Gustavo

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