Am Montag, den 07.01.2019, 13:28 +0000 schrieb Leonard Crestez: > This was implemented in the driver but not actually defined and > referenced in dts. This makes it always on. > > From reference manual in section "10.4.1.4.1 Power Distribution": > > "Display domain - The DISPLAY domain contains GIS, CSI, PXP, LCDIF, > PCIe, DCIC, and LDB. It is supplied by internal regulator." > > The current pd_pcie is actually only for PCIE_PHY, the PCIE ip block is > actually inside the DISPLAY domain. Handle this by adding the pcie node > in both power domains. > > Signed-off-by: Leonard Crestez <[email protected]>
Acked-by: Lucas Stach <[email protected]> > --- > arch/arm/boot/dts/imx6sx.dtsi | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > This is the last part of a series which was previously accepted, it was > delayed because it depends on PCI multi-pd support. All driver > dependencies have landed in 5.0-rc1, resending for 5.1 as discussed: > > https://lore.kernel.org/patchwork/patch/996812/#1190746 > > Only change is a minor conflict with removing a pxp clk. > > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi > index 272ff6133ec1..ecf3f3e5c0a0 100644 > --- a/arch/arm/boot/dts/imx6sx.dtsi > +++ b/arch/arm/boot/dts/imx6sx.dtsi > @@ -783,10 +783,22 @@ > > #power-domain-cells = <0>; > > power-supply = <®_soc>; > > clocks = <&clks IMX6SX_CLK_GPU>; > > }; > > > > + pd_disp: power-domain@2 { > > + reg = <2>; > > + #power-domain-cells = <0>; > > + clocks = <&clks > > IMX6SX_CLK_PXP_AXI>, > > + <&clks > > IMX6SX_CLK_DISPLAY_AXI>, > > + <&clks > > IMX6SX_CLK_LCDIF1_PIX>, > > + <&clks > > IMX6SX_CLK_LCDIF_APB>, > > + <&clks > > IMX6SX_CLK_LCDIF2_PIX>, > > + <&clks IMX6SX_CLK_CSI>, > > + <&clks > > IMX6SX_CLK_VADC>; > > + }; > + > > > pd_pci: power-domain@3 { > > reg = <3>; > > #power-domain-cells = <0>; > > power-supply = <®_pcie>; > > }; > @@ -1203,10 +1215,11 @@ > > compatible = "fsl,imx6sx-pxp", > > "fsl,imx6ull-pxp"; > > reg = <0x02218000 0x4000>; > > interrupts = <GIC_SPI 8 > > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clks IMX6SX_CLK_PXP_AXI>; > > clock-names = "axi"; > > + power-domains = <&pd_disp>; > > status = "disabled"; > > }; > > > > csi2: csi@221c000 { > > reg = <0x0221c000 0x4000>; > @@ -1224,10 +1237,11 @@ > > interrupts = <GIC_SPI 5 > > IRQ_TYPE_EDGE_RISING>; > > clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>, > > <&clks IMX6SX_CLK_LCDIF_APB>, > > <&clks IMX6SX_CLK_DISPLAY_AXI>; > > clock-names = "pix", "axi", "disp_axi"; > > + power-domains = <&pd_disp>; > > status = "disabled"; > > }; > > > > lcdif2: lcdif@2224000 { > > compatible = "fsl,imx6sx-lcdif", > > "fsl,imx28-lcdif"; > @@ -1235,19 +1249,21 @@ > > interrupts = <GIC_SPI 6 > > IRQ_TYPE_EDGE_RISING>; > > clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>, > > <&clks IMX6SX_CLK_LCDIF_APB>, > > <&clks IMX6SX_CLK_DISPLAY_AXI>; > > clock-names = "pix", "axi", "disp_axi"; > > + power-domains = <&pd_disp>; > > status = "disabled"; > > }; > > > > vadc: vadc@2228000 { > > reg = <0x02228000 0x4000>, <0x0222c000 > > 0x4000>; > > reg-names = "vadc-vafe", "vadc-vdec"; > > clocks = <&clks IMX6SX_CLK_VADC>, > > <&clks IMX6SX_CLK_CSI>; > > clock-names = "vadc", "csi"; > > + power-domains = <&pd_disp>; > > status = "disabled"; > > }; > > }; > > > > adc1: adc@2280000 { > @@ -1368,10 +1384,11 @@ > > clocks = <&clks IMX6SX_CLK_PCIE_AXI>, > > <&clks IMX6SX_CLK_LVDS1_OUT>, > > <&clks IMX6SX_CLK_PCIE_REF_125M>, > > <&clks IMX6SX_CLK_DISPLAY_AXI>; > > clock-names = "pcie", "pcie_bus", "pcie_phy", > > "pcie_inbound_axi"; > > - power-domains = <&pd_pci>; > > + power-domains = <&pd_disp>, <&pd_pci>; > > + power-domain-names = "pcie", "pcie_phy"; > > status = "disabled"; > > }; > > }; > };
