On Thu, Dec 27, 2018 at 4:48 PM Anup Patel <a...@brainfault.org> wrote: > > This patchset primarily adds IRQ affinity support in PLIC driver and > other improvements. > > It gives mechanism for explicitly route external interrupts to particular > CPUs using smp_affinity attribute of each Linux IRQs. Also, we can now > use IRQ balancer from kernel-space or user-space. > > The patchset is tested on QEMU virt machine. It is based on Linux-4.20 > and can be found at riscv_plic_irq_affinity_v4 branch of: > https://github.com/avpatel/linux.git > > Changes since v3: > - Dropped PATCH2 > - Added PATCH to not inline plic_toggle() and plic_irq_toggle() > - Moved PATCH3 changes to PATCH6 > - Used WARN_ON_ONCE() instead of WARN_ON() in PATCH5 > > Changes since v2: > - Fixed incorrect address of enable registers using sizeof(u32) in PATCH1 > - Retained comment about need for locking in PATCH1 > - Split PATCH2 into two patches > - Split PATCH3 into two patches > - Minor fix in commit description of PATCH4 > > Changes since v1: > - Removed few whitspace changes from PATCH1 > - Keep use of DEFINE_PER_CPU() as it is > > Anup Patel (5): > irqchip: sifive-plic: Pre-compute context hart base and enable base > irqchip: sifive-plic: Don't inline plic_toggle() and plic_irq_toggle() > irqchip: sifive-plic: Add warning in plic_init() if handler already > present > irqchip: sifive-plic: Differentiate between PLIC handler and context > irqchip: sifive-plic: Implement irq_set_affinity() for SMP host > > drivers/irqchip/irq-sifive-plic.c | 110 +++++++++++++++++++----------- > 1 file changed, 71 insertions(+), 39 deletions(-) > > -- > 2.17.1 >
Hi All, Any comments on this series?? Regards, Anup
