One pin can be muxed as PCIe endpoint card reset.

Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi 
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index f6f8d2b3b2c1..91c0ec9c382b 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -295,6 +295,15 @@
                                        function = "mii";
                                };
 
+                               pcie_reset_pins: pcie-reset-pins {
+                                       groups = "pcie1";
+                                       function = "pcie";
+                               };
+
+                               pcie_clkreq_pins: pcie-clkreq-pins {
+                                       groups = "pcie1_clkreq";
+                                       function = "pcie";
+                               };
                        };
 
                        eth0: ethernet@30000 {
-- 
2.19.1

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