On i.mx8 mscale B0 chip, AHB/SDMA clock ratio 2:1 can't be supportted, since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach to 500Mhz, so use 1:1 instead.
based on NXP commit MLK-16841-1 Signed-off-by: Angus Ainslie (Purism) <[email protected]> --- .../devicetree/bindings/dma/fsl-imx-sdma.txt | 1 + drivers/dma/imx-sdma.c | 20 +++++++++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt index 3c9a57a8443b..17544c1820b7 100644 --- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt @@ -67,6 +67,7 @@ Optional properties: reg is the GPR register offset. shift is the bit position inside the GPR register. val is the value of the bit (0 or 1). +- fsl,ratio-1-1: AHB/SDMA core clock ration 1:1, 2:1 without this. Examples: diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 0b3a67ff8e82..65dada21d3c1 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -440,6 +440,8 @@ struct sdma_engine { unsigned int irq; dma_addr_t bd0_phys; struct sdma_buffer_descriptor *bd0; + /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/ + bool clk_ratio; }; static int sdma_config_write(struct dma_chan *chan, @@ -662,8 +664,14 @@ static int sdma_run_channel0(struct sdma_engine *sdma) dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); /* Set bits of CONFIG register with dynamic context switching */ - if (readl(sdma->regs + SDMA_H_CONFIG) == 0) - writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG); + if (readl(sdma->regs + SDMA_H_CONFIG) == 0) { + if (sdma->clk_ratio) + reg = SDMA_H_CONFIG_CSM | SDMA_H_CONFIG_ACR; + else + reg = SDMA_H_CONFIG_CSM; + + writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG); + } return ret; } @@ -1880,8 +1888,10 @@ static int sdma_init(struct sdma_engine *sdma) writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); /* Set bits of CONFIG register but with static context switching */ - /* FIXME: Check whether to set ACR bit depending on clock ratios */ - writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); + if (sdma->clk_ratio) + writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG); + else + writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); @@ -1975,6 +1985,8 @@ static int sdma_probe(struct platform_device *pdev) if (!sdma) return -ENOMEM; + sdma->clk_ratio = of_property_read_bool(np, "fsl,ratio-1-1"); + spin_lock_init(&sdma->channel_0_lock); sdma->dev = &pdev->dev; -- 2.17.1
