On Wed, Feb 06, 2019 at 03:21:41PM +0000, Borislav Petkov wrote: > On Wed, Feb 06, 2019 at 02:52:53PM +0300, Kirill A. Shutemov wrote: > > RDMSR in the trampoline code overrides EDX, but we use the register to > > indicate if 5-level paging has to enabled. It leads to failure to boot > > on a 5-level paging machine. > > > > Preserve EDX on the stack while we are dealing with EFER. > > Comment says: > > * Non zero RDX on return means we need to enable 5-level paging. > > Is that per-chance refering to struct paging_config which > paging_prepare() returns and on that return rdx contains > paging_config.l5_required which is 1 when 5 level is to be enabled?
Yes. > If so, is that written somewhere explicitly? Because it is not > immediately clear at least to me why that RDX is live... What about this: >From d43b9d157c574baf782f6d9982fe6f2c1f918c0e Mon Sep 17 00:00:00 2001 From: "Kirill A. Shutemov" <[email protected]> Date: Wed, 6 Feb 2019 18:29:08 +0300 Subject: [PATCH] x86/boot/compressed/64: Fix confusing comment for paging_config() paging_prepare() returns two-quadword structure which lands into RDX:RAX: - Address of the trampoline is returned in RAX. - Non zero RDX means trampoline needs to enable 5-level paging. Signed-off-by: Kirill A. Shutemov <[email protected]> --- arch/x86/boot/compressed/head_64.S | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index f62e347862cc..87509a3f00f4 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S @@ -358,8 +358,11 @@ ENTRY(startup_64) * paging_prepare() sets up the trampoline and checks if we need to * enable 5-level paging. * - * Address of the trampoline is returned in RAX. - * Non zero RDX on return means we need to enable 5-level paging. + * paging_prepare() returns two-quadword structure which lands + * into RDX:RAX: + * - Address of the trampoline is returned in RAX. + * - Non zero RDX means trampoline needs to enable 5-level + * paging. * * RSI holds real mode data and needs to be preserved across * this function call. @@ -565,7 +568,7 @@ adjust_got: * * RDI contains the return address (might be above 4G). * ECX contains the base address of the trampoline memory. - * Non zero RDX on return means we need to enable 5-level paging. + * Non zero RDX means trampoline needs to enable 5-level paging. */ ENTRY(trampoline_32bit_src) /* Set up data and stack segments */ -- Kirill A. Shutemov
