From: Bartosz Golaszewski <[email protected]> I've been unable to figure out exactly why, but the IRQ_TINT1_TINT34 interrupt is being handled as level irq and it's configured in the irq chip driver instead of set by the irq_set_type() callback.
Since this is probably some legacy hack for out-of-tree code - remove it. Signed-off-by: Bartosz Golaszewski <[email protected]> --- arch/arm/mach-davinci/irq.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 2b6943731af9..92b6e653d8cb 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -18,8 +18,6 @@ #include <asm/mach/irq.h> #include <asm/exception.h> -#include "irqs.h" - #define DAVINCI_AINTC_FIQ_REG0 0x00 #define DAVINCI_AINTC_FIQ_REG1 0x04 #define DAVINCI_AINTC_IRQ_REG0 0x08 @@ -165,6 +163,5 @@ void __init davinci_aintc_init(const struct davinci_aintc_config *config) davinci_aintc_setup_gc(davinci_aintc_base + reg_off, irq_base + irq_off, 32); - irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq); set_handle_irq(davinci_aintc_handle_irq); } -- 2.20.1
