On 8/8/07, Muli Ben-Yehuda <[EMAIL PROTECTED]> wrote: > > Can you explain why this patch (and your other patches in this area) > are needed? is this a performance issue? the patches seem complex, is > there a good argument for that complexity? > 1. AMD K8 system with two HT chain: when acpi=off or there is not _PXM in DSDT, still make numa_node of device get correct value. ... /sys/devices/pci0000:80/*/numa_node will be correct instead of 0 for all. ---- so far i didn't find one two chain AMD k8 based system have _PXM in DSDT... 2. could use dev_to_node instead of pcibus_to_node. 3. complex? I don't think so. It just try to get bus_to_node mapping from pci conf space and put into one 256 byte array early, and then use it some link pxm_to_node. 4. make it support quad core opteron by change to scan four regs in NB func1 intead of func0.
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