When VMExit occurs, the Guest CET MSRs are stored in two different places, U_CET/PL0_SSP/PL1_SSP/PL2_SSP/PL3_SSP are stored in fpu xsave area, they are operated by XSAVES/XRSTORS, so before access these MSRs, kvm_load_guest_fpu is required to restore them to Host MSRs. After finish operation, need to restore Host MSRs by kvm_put_guest_fpu, these two functions are call in __msr_io(). S_CET and INTR_SSP_TABLE are stored in VMCS fields, so they can be access via vmcs_read/vmcs_write directly.
Signed-off-by: Yang Weijiang <[email protected]> --- arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/kvm/vmx.c | 42 ++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 298721ff00f4..cc94ab14a946 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -782,6 +782,8 @@ #define MSR_IA32_U_CET 0x6a0 /* user mode cet setting */ #define MSR_IA32_S_CET 0x6a2 /* kernel mode cet setting */ #define MSR_IA32_PL0_SSP 0x6a4 /* kernel shstk pointer */ +#define MSR_IA32_PL1_SSP 0x6a5 /* ring 1 shstk pointer */ +#define MSR_IA32_PL2_SSP 0x6a6 /* ring 2 shstk pointer */ #define MSR_IA32_PL3_SSP 0x6a7 /* user shstk pointer */ #define MSR_IA32_INT_SSP_TAB 0x6a8 /* exception shstk table */ diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 816e11a66557..5923b89fe120 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -4153,6 +4153,27 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) return 1; msr_info->data = vcpu->arch.ia32_xss; break; + case MSR_IA32_S_CET: + msr_info->data = vmcs_readl(GUEST_S_CET); + break; + case MSR_IA32_U_CET: + rdmsrl(MSR_IA32_U_CET, msr_info->data); + break; + case MSR_IA32_INT_SSP_TAB: + msr_info->data = vmcs_readl(GUEST_INTR_SSP_TABLE); + break; + case MSR_IA32_PL0_SSP: + rdmsrl(MSR_IA32_PL0_SSP, msr_info->data); + break; + case MSR_IA32_PL1_SSP: + rdmsrl(MSR_IA32_PL1_SSP, msr_info->data); + break; + case MSR_IA32_PL2_SSP: + rdmsrl(MSR_IA32_PL2_SSP, msr_info->data); + break; + case MSR_IA32_PL3_SSP: + rdmsrl(MSR_IA32_PL3_SSP, msr_info->data); + break; case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) @@ -4337,6 +4358,27 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) else clear_atomic_switch_msr(vmx, MSR_IA32_XSS); break; + case MSR_IA32_S_CET: + vmcs_writel(GUEST_S_CET, data); + break; + case MSR_IA32_U_CET: + wrmsrl(MSR_IA32_U_CET, data); + break; + case MSR_IA32_INT_SSP_TAB: + vmcs_writel(GUEST_INTR_SSP_TABLE, data); + break; + case MSR_IA32_PL0_SSP: + wrmsrl(MSR_IA32_PL0_SSP, data); + break; + case MSR_IA32_PL1_SSP: + wrmsrl(MSR_IA32_PL1_SSP, data); + break; + case MSR_IA32_PL2_SSP: + wrmsrl(MSR_IA32_PL2_SSP, data); + break; + case MSR_IA32_PL3_SSP: + wrmsrl(MSR_IA32_PL3_SSP, data); + break; case MSR_TSC_AUX: if (!msr_info->host_initiated && !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP)) -- 2.17.1
