On Wed, Mar 20, 2019 at 05:04:58PM -0700, Alistair Francis wrote: > > Well, it starts at 0x00, but the first one is reserved. If you think > > that is too confusing I'd rather throw in a comment explaining this > > fact rather than making the calculating more complicated. > > It doesn't mention that it starts at 0 when you look here: > https://sifive.cdn.prismic.io/sifive%2F834354f0-08e6-423c-bf1f-0cb58ef14061_fu540-c000-v1.0.pdf
It doesn't say that. But it is completely obvious from the map, and from how everything else works. In this case I think the documentation is simply written in a confusing way, and we need to fix it once we have an official riscv spec level documentation of this hardware.
