Amlogic G12A embeds 2 CEC controllers : - AO-CEC-A the same controller as in GXBB, GXL & GXM SoCs - AO-CEC-B is a new controller
Note, the two controller can work simultanously since 2 Pads can handle CEC, thus this SoC can handle 2 distinct CEC busses. This patch adds the nodes for the AO-CEC-A and AO-CEC-B controllers. Signed-off-by: Neil Armstrong <narmstr...@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 34 +++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index a696612f8f44..9f72396ba710 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -169,6 +169,22 @@ gpio-ranges = <&periphs_pinctrl 0 0 86>; }; + cec_ao_a_h_pins: cec_ao_a_h { + mux { + groups = "cec_ao_a_h"; + function = "cec_ao_a_h"; + bias-disable; + }; + }; + + cec_ao_b_h_pins: cec_ao_b_h { + mux { + groups = "cec_ao_b_h"; + function = "cec_ao_b_h"; + bias-disable; + }; + }; + hdmitx_ddc_pins: hdmitx_ddc { mux { groups = "hdmitx_sda", @@ -405,12 +421,30 @@ }; }; + cec_AO: cec@100 { + compatible = "amlogic,meson-gx-ao-cec"; + reg = <0x0 0x00100 0x0 0x14>; + interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc_AO CLKID_AO_CEC>; + clock-names = "core"; + status = "disabled"; + }; + sec_AO: ao-secure@140 { compatible = "amlogic,meson-gx-ao-secure", "syscon"; reg = <0x0 0x140 0x0 0x140>; amlogic,has-chip-id; }; + cecb_AO: cec@280 { + compatible = "amlogic,meson-g12a-ao-cec"; + reg = <0x0 0x00280 0x0 0x1c>; + interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>; + clock-names = "oscin"; + status = "disabled"; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; -- 2.21.0