Add the controller dedicated to audio clocks found on the g12a SoC.

Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 37 +++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index d6ca0bbd8f74..1ab2a77b01eb 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/clock/g12a-clkc.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
 
 / {
        compatible = "amlogic,g12a";
@@ -202,6 +203,42 @@
                                        };
                                };
                        };
+
+                       audio: bus@42000 {
+                               compatible = "simple-bus";
+                               reg = <0x0 0x42000 0x0 0x2000>;
+                               #address-cells = <2>;
+                               #size-cells = <2>;
+                               ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
+
+                               clkc_audio: clock-controller@0 {
+                                       status = "disabled";
+                                       compatible = "amlogic,g12a-audio-clkc";
+                                       reg = <0x0 0x0 0x0 0xb4>;
+                                       #clock-cells = <1>;
+
+                                       clocks = <&clkc CLKID_AUDIO>,
+                                                <&clkc CLKID_MPLL0>,
+                                                <&clkc CLKID_MPLL1>,
+                                                <&clkc CLKID_MPLL2>,
+                                                <&clkc CLKID_MPLL3>,
+                                                <&clkc CLKID_HIFI_PLL>,
+                                                <&clkc CLKID_FCLK_DIV3>,
+                                                <&clkc CLKID_FCLK_DIV4>,
+                                                <&clkc CLKID_GP0_PLL>;
+                                       clock-names = "pclk",
+                                                     "mst_in0",
+                                                     "mst_in1",
+                                                     "mst_in2",
+                                                     "mst_in3",
+                                                     "mst_in4",
+                                                     "mst_in5",
+                                                     "mst_in6",
+                                                     "mst_in7";
+
+                                       resets = <&reset RESET_AUDIO>;
+                               };
+                       };
                };
 
                aobus: bus@ff800000 {
-- 
2.20.1

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