add gce device node for mt8183 Signed-off-by: Bibby Hsieh <[email protected]>
--- This patch is based on v5.1-rc1 and these patches: https://patchwork.kernel.org/patch/10856987/ https://patchwork.kernel.org/patch/10839021/ https://patchwork.kernel.org/patch/10879015/ https://patchwork.kernel.org/patch/10878999/ https://patchwork.kernel.org/patch/10858941/ https://patchwork.kernel.org/patch/10846685/ https://patchwork.kernel.org/patch/10893519/ --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b36e37fcdfe3..60809490a74b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -9,6 +9,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/mt8183-power.h> +#include <dt-bindings/gce/mt8183-gce.h> #include "mt8183-pinfunc.h" / { compatible = "mediatek,mt8183"; @@ -293,6 +294,17 @@ clock-names = "spi", "wrap"; }; + gce: gce@10238000 { + compatible = "mediatek,mt8183-gce"; + reg = <0 0x10238000 0 0x4000>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; + #mbox-cells = <3>; + #gce-event-cells = <1>; + #gce-subsys-cells = <3>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart"; -- 2.18.0
