[PATCH v2 2/2] arm64: dts: mt8183: Add auxadc device node

[Zhiyong Tao]

Add auxadc device node for MT8183

Signed-off-by: Zhiyong Tao <zhiyong....@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8183-evb.dts |  4 ++++
 arch/arm64/boot/dts/mediatek/mt8183.dtsi    | 10 ++++++++++
 2 files changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts 
b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index 9b525597e5ec..49909acc6efa 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -26,6 +26,10 @@
        };
 };
 
+&auxadc {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 75c4881bbe5e..57580d973316 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -269,6 +269,16 @@
                        clock-names = "spi", "wrap";
                };
 
+               auxadc: auxadc@11001000 {
+                       compatible = "mediatek,mt8183-auxadc",
+                                    "mediatek,mt8173-auxadc";
+                       reg = <0 0x11001000 0 0x1000>;
+                       clocks = <&infracfg CLK_INFRA_AUXADC>;
+                       clock-names = "main";
+                       #io-channel-cells = <1>;
+                       status = "disabled";
+               };
+
                uart0: serial@11002000 {
                        compatible = "mediatek,mt8183-uart",
                                     "mediatek,mt6577-uart";
-- 
2.12.5