[PATCH v4 3/3] arm64: dts: qcom: qcs404-evb: Enable PCIe

[Bjorn Andersson]

Enable the PCIe PHY and controller found on the QCS404 EVB.

Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org>
---

Changes since v3:
- Split single patch, no functional change

 arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 26 ++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi 
b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index 2c3127167e3c..d1108a6abd0a 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 // Copyright (c) 2018, Linaro Limited
 
+#include <dt-bindings/gpio/gpio.h>
 #include "qcs404.dtsi"
 #include "pms405.dtsi"
 
@@ -68,6 +69,22 @@
        };
 };
 
+&pcie {
+       status = "ok";
+
+       perst-gpio = <&tlmm 43 GPIO_ACTIVE_LOW>;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&perst_state>;
+};
+
+&pcie_phy {
+       status = "ok";
+
+       vdda-vp-supply = <&vreg_l3_1p05>;
+       vdda-vph-supply = <&vreg_l5_1p8>;
+};
+
 &remoteproc_adsp {
        status = "ok";
 };
@@ -184,6 +201,15 @@
 };
 
 &tlmm {
+       perst_state: perst {
+               pins = "gpio43";
+               function = "gpio";
+
+               drive-strength = <2>;
+               bias-disable;
+               output-low;
+       };
+
        sdc1_on: sdc1-on {
                clk {
                        pins = "sdc1_clk";
-- 
2.18.0