Hi Mason, Mason Yang <[email protected]> wrote on Mon, 15 Apr 2019 17:23:54 +0800:
> Document the bindings used by the Macronix MX25F0A MFD controller. > > Signed-off-by: Mason Yang <[email protected]> > --- > .../devicetree/bindings/mfd/mxic-mx25f0a.txt | 51 > ++++++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > > diff --git a/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > b/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > new file mode 100644 > index 0000000..7f3e0f8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/mxic-mx25f0a.txt > @@ -0,0 +1,51 @@ > +Macronix MX25F0A MultiFunction Device Tree Bindings > +---------------------------------------------------- > + > +MX25F0A is a MultiFunction Device with SPI and raw NAND, which > +supports either spi host controller or raw nand controller. Acronyms in plain English should be in upper case. > + > +Required properties: > +- compatible: should be "mxic,mx25f0a" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain 2 entries, one for the registers and one for the direct > + mapping area in SPI mode. > +- reg-names: should contain "regs" and "dirmap" > +- interrupts: interrupt line connected to this MFD controller > +- SPI controller driver: > + - clock-names: should contain "ps_clk", "send_clk" and > + "send_dly_clk" > + - clocks: should contain 3 entries for the "ps_clk", "send_clk" > + and "send_dly_clk" clocks > + > +- Raw nand controller driver. > + - nand-ecc-mode = "soft"; > + - nand-ecc-algo = "bch"; > + > +Example: > + > + mxic: mx25f0a@43c30000 { > + compatible = "mxic,mx25f0a"; > + reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; > + reg-names = "regs", "dirmap"; > + > + /* spi */ > + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; > + clock-names = "send_clk", "send_dly_clk", "ps_clk"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <25000000>; > + spi-tx-bus-width = <4>; > + spi-rx-bus-width = <4>; > + }; > + > + /* nand */ > + nand-ecc-mode = "soft"; > + nand-ecc-algo = "bch"; > + nand-ecc-step-size = <512>; > + nand-ecc-strength = <8>; Any reason to enforce 512B/8b correction? Why not letting the core choose for you depending on the NAND chip's requirements? Anyway, I think you can have only one or the other (NAND or SPI), not both, and you probably should have a compatible or a property to tell the kernel which one you are using, right? Thanks, Miquèl
