Hi Bo,
On 5/17/19 1:02 AM, Tong, Bo wrote:
Is this patch going to be merged? Or still any blocking issue there?
Thanks,
Bo
-----Original Message-----
From: shuah [mailto:[email protected]]
Sent: Friday, April 19, 2019 10:05 PM
To: Tong, Bo <[email protected]>; [email protected]; [email protected]
Cc: [email protected]; [email protected];
[email protected]; [email protected]
Subject: Re: [PATCH v3] selftests/x86: Support Atom for syscall_arg_fault test
On 4/19/19 1:10 AM, Tong Bo wrote:
Atom-based CPUs trigger stack fault when invoke 32-bit SYSENTER
instruction with invalid register values. So we also need SIGBUS handling in
this case.
Following is assembly when the fault exception happens.
(gdb) disassemble $eip
Dump of assembler code for function __kernel_vsyscall:
0xf7fd8fe0 <+0>: push %ecx
0xf7fd8fe1 <+1>: push %edx
0xf7fd8fe2 <+2>: push %ebp
0xf7fd8fe3 <+3>: mov %esp,%ebp
0xf7fd8fe5 <+5>: sysenter
0xf7fd8fe7 <+7>: int $0x80
=> 0xf7fd8fe9 <+9>: pop %ebp
0xf7fd8fea <+10>: pop %edx
0xf7fd8feb <+11>: pop %ecx
0xf7fd8fec <+12>: ret
End of assembler dump.
According to Intel SDM, this could also be a Stack Segment Fault(#SS,
12), except a normal Page Fault(#PF, 14). Especially, in section 6.9
of Vol.3A, both stack and page faults are within the 10th(lowest
priority) class, and as it said, "exceptions within each class are
implementation-dependent and may vary from processor to processor".
It's expected for processors like Intel Atom to trigger stack
fault(SIGBUS), while we get page fault(SIGSEGV) from common Core processors.
Signed-off-by: Tong Bo <[email protected]>
Acked-by: Andy Lutomirski <[email protected]>
---
tools/testing/selftests/x86/syscall_arg_fault.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/x86/syscall_arg_fault.c
b/tools/testing/selftests/x86/syscall_arg_fault.c
index 7db4fc9..d2548401 100644
--- a/tools/testing/selftests/x86/syscall_arg_fault.c
+++ b/tools/testing/selftests/x86/syscall_arg_fault.c
@@ -43,7 +43,7 @@ static sigjmp_buf jmpbuf;
static volatile sig_atomic_t n_errs;
-static void sigsegv(int sig, siginfo_t *info, void *ctx_void)
+static void sigsegv_or_sigbus(int sig, siginfo_t *info, void
+*ctx_void)
{
ucontext_t *ctx = (ucontext_t*)ctx_void;
@@ -73,7 +73,13 @@ int main()
if (sigaltstack(&stack, NULL) != 0)
err(1, "sigaltstack");
- sethandler(SIGSEGV, sigsegv, SA_ONSTACK);
+ sethandler(SIGSEGV, sigsegv_or_sigbus, SA_ONSTACK);
+ /*
+ * The actual exception can vary. On Atom CPUs, we get #SS
+ * instead of #PF when the vDSO fails to access the stack when
+ * ESP is too close to 2^32, and #SS causes SIGBUS.
+ */
+ sethandler(SIGBUS, sigsegv_or_sigbus, SA_ONSTACK);
sethandler(SIGILL, sigill, SA_ONSTACK);
/*
In case there is a dependency on x86 tree, here is my Ack
Acked-by: Shuah Khan <[email protected]>
Looks like it got left behind in the confusion of which tree.
I will apply this to my tree.
thanks,
-- Shuah
